Technologies for low-latency compression

ABSTRACT

Technologies for low-latency compression in a data center are disclosed. In the illustrative embodiment, a storage sled compresses data with a low-latency compression algorithm prior to storing the data. The latency of the compression algorithm is less than the latency of the storage device, so that the latency of the storage and retrieval times are not significantly affected by the compression and decompression. In other embodiments, a compute sled may compress data with a low-latency compression algorithm prior to sending the data to a storage sled.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims the benefit of U.S. Provisional Patent Application No. 62/365,969, filed Jul. 22, 2016, U.S. Provisional Patent Application No. 62/376,859, filed Aug. 18, 2016, and U.S. Provisional Patent Application No. 62/427,268, filed Nov. 29, 2016.

BACKGROUND

A data center may create and manage large amounts of data. Compressing the data prior to storing it may allow the data to be stored more efficiently, but data compression may also significantly increase the latency for accessing the data, particularly for data stored in solid-state hard drives with a low latency.

Some data in a data center is accessed more than others. Data that is accessed frequently may be stored in storage that has a lower latency. Since that data is accessed more often, a lower latency for accessing that data will lead to a better overall performance as compared to storing data that is accessed less often in a medium with a low latency.

BRIEF DESCRIPTION OF THE DRAWINGS

The concepts described herein are illustrated by way of example and not by way of limitation in the accompanying figures. For simplicity and clarity of illustration, elements illustrated in the figures are not necessarily drawn to scale. Where considered appropriate, reference labels have been repeated among the figures to indicate corresponding or analogous elements.

FIG. 1 is a diagram of a conceptual overview of a data center in which one or more techniques described herein may be implemented according to various embodiments;

FIG. 2 is a diagram of an example embodiment of a logical configuration of a rack of the data center of FIG. 1;

FIG. 3 is a diagram of an example embodiment of another data center in which one or more techniques described herein may be implemented according to various embodiments;

FIG. 4 is a diagram of another example embodiment of a data center in which one or more techniques described herein may be implemented according to various embodiments;

FIG. 5 is a diagram of a connectivity scheme representative of link-layer connectivity that may be established among various sleds of the data centers of FIGS. 1, 3, and 4;

FIG. 6 is a diagram of a rack architecture that may be representative of an architecture of any particular one of the racks depicted in FIGS. 1-4 according to some embodiments;

FIG. 7 is a diagram of an example embodiment of a sled that may be used with the rack architecture of FIG. 6;

FIG. 8 is a diagram of an example embodiment of a rack architecture to provide support for sleds featuring expansion capabilities;

FIG. 9 is a diagram of an example embodiment of a rack implemented according to the rack architecture of FIG. 8;

FIG. 10 is a diagram of an example embodiment of a sled designed for use in conjunction with the rack of FIG. 9;

FIG. 11 is a diagram of an example embodiment of a data center in which one or more techniques described herein may be implemented according to various embodiments;

FIG. 12 is a simplified block diagram of at least one embodiment of a compute sled of the data center of FIG. 1;

FIG. 13 is a simplified block diagram of at least one embodiment of a storage sled of the data center of FIG. 1;

FIG. 14 is a top perspective view of an example embodiment of a storage sled of FIG. 13;

FIG. 15 is a bottom perspective view of an example embodiment of a storage sled of FIG. 13;

FIG. 16 is an environment that may be established by the compute sled of FIG. 12;

FIG. 17 is an environment that may be established by the storage sled of FIG. 13;

FIG. 18 is at least one embodiment of a flowchart of a method for compressing and sending data to a storage sled that may be executed by the compute sled of FIG. 12;

FIG. 19 is at least one embodiment of a flowchart of a method for retrieving compressed data from a storage sled that may be executed by the compute sled of FIG. 12;

FIG. 20 is at least one embodiment of a flowchart of a method for compressing and storing data that may be executed by the storage sled of FIG. 13; and

FIG. 21 is at least one embodiment of a flowchart of a method for retrieving stored data that may be executed by the storage sled of FIG. 13.

DETAILED DESCRIPTION OF THE DRAWINGS

While the concepts of the present disclosure are susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawings and will be described herein in detail. It should be understood, however, that there is no intent to limit the concepts of the present disclosure to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives consistent with the present disclosure and the appended claims.

References in the specification to “one embodiment,” “an embodiment,” “an illustrative embodiment,” etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may or may not necessarily include that particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described. Additionally, it should be appreciated that items included in a list in the form of “at least one A, B, and C” can mean (A); (B); (C): (A and B); (B and C); (A and C); or (A, B, and C). Similarly, items listed in the form of “at least one of A, B, or C” can mean (A); (B); (C): (A and B); (B and C); (A and C); or (A, B, and C).

The disclosed embodiments may be implemented, in some cases, in hardware, firmware, software, or any combination thereof. The disclosed embodiments may also be implemented as instructions carried by or stored on one or more transitory or non-transitory machine-readable (e.g., computer-readable) storage medium, which may be read and executed by one or more processors. A machine-readable storage medium may be embodied as any storage device, mechanism, or other physical structure for storing or transmitting information in a form readable by a machine (e.g., a volatile or non-volatile memory, a media disc, or other media device).

In the drawings, some structural or method features may be shown in specific arrangements and/or orderings. However, it should be appreciated that such specific arrangements and/or orderings may not be required. Rather, in some embodiments, such features may be arranged in a different manner and/or order than shown in the illustrative figures. Additionally, the inclusion of a structural or method feature in a particular figure is not meant to imply that such feature is required in all embodiments and, in some embodiments, may not be included or may be combined with other features.

FIG. 1 illustrates a conceptual overview of a data center 100 that may generally be representative of a data center or other type of computing network in/for which one or more techniques described herein may be implemented according to various embodiments. As shown in FIG. 1, data center 100 may generally contain a plurality of racks, each of which may house computing equipment comprising a respective set of physical resources. In the particular non-limiting example depicted in FIG. 1, data center 100 contains four racks 102A to 102D, which house computing equipment comprising respective sets of physical resources 105A to 105D. According to this example, a collective set of physical resources 106 of data center 100 includes the various sets of physical resources 105A to 105D that are distributed among racks 102A to 102D. Physical resources 106 may include resources of multiple types, such as—for example—processors, co-processors, accelerators, field-programmable gate arrays (FPGAs), memory, and storage. The embodiments are not limited to these examples.

The illustrative data center 100 differs from typical data centers in many ways. For example, in the illustrative embodiment, the circuit boards (“sleds”) on which components such as CPUs, memory, and other components are placed are designed for increased thermal performance. In particular, in the illustrative embodiment, the sleds are shallower than typical boards. In other words, the sleds are shorter from the front to the back, where cooling fans are located. This decreases the length of the path that air must to travel across the components on the board. Further, the components on the sled are spaced further apart than in typical circuit boards, and the components are arranged to reduce or eliminate shadowing (i.e., one component in the air flow path of another component). In the illustrative embodiment, processing components such as the processors are located on a top side of a sled while near memory, such as Dual In-line Memory Modules (DIMMs), are located on a bottom side of the sled. As a result of the enhanced airflow provided by this design, the components may operate at higher frequencies and power levels than in typical systems, thereby increasing performance. Furthermore, the sleds are configured to blindly mate with power and data communication cables in each rack 102A, 102B, 102C, 102D, enhancing their ability to be quickly removed, upgraded, reinstalled, and/or replaced. Similarly, individual components located on the sleds, such as processors, accelerators, memory, and data storage drives, are configured to be easily upgraded due to their increased spacing from each other. In the illustrative embodiment, the components additionally include hardware attestation features to prove their authenticity.

Furthermore, in the illustrative embodiment, the data center 100 utilizes a single network architecture (“fabric”) that supports multiple other network architectures including Ethernet and Omni-Path. The sleds, in the illustrative embodiment, are coupled to switches via optical fibers, which provide higher bandwidth and lower latency than typical twisted pair cabling (e.g., Category 5, Category 5e, Category 6, etc.). Due to the high bandwidth, low latency interconnections and network architecture, the data center 100 may, in use, pool resources, such as memory, accelerators (e.g., graphics accelerators, FPGAs, Application Specific Integrated Circuits (ASICs), etc.), and data storage drives that are physically disaggregated, and provide them to compute resources (e.g., processors) on an as needed basis, enabling the compute resources to access the pooled resources as if they were local. The illustrative data center 100 additionally receives usage information for the various resources, predicts resource usage for different types of workloads based on past resource usage, and dynamically reallocates the resources based on this information.

The racks 102A, 102B, 102C, 102D of the data center 100 may include physical design features that facilitate the automation of a variety of types of maintenance tasks. For example, data center 100 may be implemented using racks that are designed to be robotically-accessed, and to accept and house robotically-manipulatable resource sleds. Furthermore, in the illustrative embodiment, the racks 102A, 102B, 102C, 102D include integrated power sources that receive a greater voltage than is typical for power sources. The increased voltage enables the power sources to provide additional power to the components on each sled, enabling the components to operate at higher than typical frequencies.

FIG. 2 illustrates an exemplary logical configuration of a rack 202 of the data center 100. As shown in FIG. 2, rack 202 may generally house a plurality of sleds, each of which may comprise a respective set of physical resources. In the particular non-limiting example depicted in FIG. 2, rack 202 houses sleds 204-1 to 204-4 comprising respective sets of physical resources 205-1 to 205-4, each of which constitutes a portion of the collective set of physical resources 206 comprised in rack 202. With respect to FIG. 1, if rack 202 is representative of—for example—rack 102A, then physical resources 206 may correspond to the physical resources 105A comprised in rack 102A. In the context of this example, physical resources 105A may thus be made up of the respective sets of physical resources, including physical storage resources 205-1, physical accelerator resources 205-2, physical memory resources 205-3, and physical compute resources 205-5 comprised in the sleds 204-1 to 204-4 of rack 202. The embodiments are not limited to this example. Each sled may contain a pool of each of the various types of physical resources (e.g., compute, memory, accelerator, storage). By having robotically accessible and robotically manipulatable sleds comprising disaggregated resources, each type of resource can be upgraded independently of each other and at their own optimized refresh rate.

FIG. 3 illustrates an example of a data center 300 that may generally be representative of one in/for which one or more techniques described herein may be implemented according to various embodiments. In the particular non-limiting example depicted in FIG. 3, data center 300 comprises racks 302-1 to 302-32. In various embodiments, the racks of data center 300 may be arranged in such fashion as to define and/or accommodate various access pathways. For example, as shown in FIG. 3, the racks of data center 300 may be arranged in such fashion as to define and/or accommodate access pathways 311A, 311B, 311C, and 311D. In some embodiments, the presence of such access pathways may generally enable automated maintenance equipment, such as robotic maintenance equipment, to physically access the computing equipment housed in the various racks of data center 300 and perform automated maintenance tasks (e.g., replace a failed sled, upgrade a sled). In various embodiments, the dimensions of access pathways 311A, 311B, 311C, and 311D, the dimensions of racks 302-1 to 302-32, and/or one or more other aspects of the physical layout of data center 300 may be selected to facilitate such automated operations. The embodiments are not limited in this context.

FIG. 4 illustrates an example of a data center 400 that may generally be representative of one in/for which one or more techniques described herein may be implemented according to various embodiments. As shown in FIG. 4, data center 400 may feature an optical fabric 412. Optical fabric 412 may generally comprise a combination of optical signaling media (such as optical cabling) and optical switching infrastructure via which any particular sled in data center 400 can send signals to (and receive signals from) each of the other sleds in data center 400. The signaling connectivity that optical fabric 412 provides to any given sled may include connectivity both to other sleds in a same rack and sleds in other racks. In the particular non-limiting example depicted in FIG. 4, data center 400 includes four racks 402A to 402D. Racks 402A to 402D house respective pairs of sleds 404A-1 and 404A-2, 404B-1 and 404B-2, 404C-1 and 404C-2, and 404D-1 and 404D-2. Thus, in this example, data center 400 comprises a total of eight sleds. Via optical fabric 412, each such sled may possess signaling connectivity with each of the seven other sleds in data center 400. For example, via optical fabric 412, sled 404A-1 in rack 402A may possess signaling connectivity with sled 404A-2 in rack 402A, as well as the six other sleds 404B-1, 404B-2, 404C-1, 404C-2, 404D-1, and 404D-2 that are distributed among the other racks 402B, 402C, and 402D of data center 400. The embodiments are not limited to this example.

FIG. 5 illustrates an overview of a connectivity scheme 500 that may generally be representative of link-layer connectivity that may be established in some embodiments among the various sleds of a data center, such as any of example data centers 100, 300, and 400 of FIGS. 1, 3, and 4. Connectivity scheme 500 may be implemented using an optical fabric that features a dual-mode optical switching infrastructure 514. Dual-mode optical switching infrastructure 514 may generally comprise a switching infrastructure that is capable of receiving communications according to multiple link-layer protocols via a same unified set of optical signaling media, and properly switching such communications. In various embodiments, dual-mode optical switching infrastructure 514 may be implemented using one or more dual-mode optical switches 515. In various embodiments, dual-mode optical switches 515 may generally comprise high-radix switches. In some embodiments, dual-mode optical switches 515 may comprise multi-ply switches, such as four-ply switches. In various embodiments, dual-mode optical switches 515 may feature integrated silicon photonics that enable them to switch communications with significantly reduced latency in comparison to conventional switching devices. In some embodiments, dual-mode optical switches 515 may constitute leaf switches 530 in a leaf-spine architecture additionally including one or more dual-mode optical spine switches 520.

In various embodiments, dual-mode optical switches may be capable of receiving both Ethernet protocol communications carrying Internet Protocol (IP packets) and communications according to a second, high-performance computing (HPC) link-layer protocol (e.g., Intel's Omni-Path Architecture's, Infiniband) via optical signaling media of an optical fabric. As reflected in FIG. 5, with respect to any particular pair of sleds 504A and 504B possessing optical signaling connectivity to the optical fabric, connectivity scheme 500 may thus provide support for link-layer connectivity via both Ethernet links and HPC links. Thus, both Ethernet and HPC communications can be supported by a single high-bandwidth, low-latency switch fabric. The embodiments are not limited to this example.

FIG. 6 illustrates a general overview of a rack architecture 600 that may be representative of an architecture of any particular one of the racks depicted in FIGS. 1 to 4 according to some embodiments. As reflected in FIG. 6, rack architecture 600 may generally feature a plurality of sled spaces into which sleds may be inserted, each of which may be robotically-accessible via a rack access region 601. In the particular non-limiting example depicted in FIG. 6, rack architecture 600 features five sled spaces 603-1 to 603-5. Sled spaces 603-1 to 603-5 feature respective multi-purpose connector modules (MPCMs) 616-1 to 616-5.

FIG. 7 illustrates an example of a sled 704 that may be representative of a sled of such a type. As shown in FIG. 7, sled 704 may comprise a set of physical resources 705, as well as an MPCM 716 designed to couple with a counterpart MPCM when sled 704 is inserted into a sled space such as any of sled spaces 603-1 to 603-5 of FIG. 6. Sled 704 may also feature an expansion connector 717. Expansion connector 717 may generally comprise a socket, slot, or other type of connection element that is capable of accepting one or more types of expansion modules, such as an expansion sled 718. By coupling with a counterpart connector on expansion sled 718, expansion connector 717 may provide physical resources 705 with access to supplemental computing resources 705B residing on expansion sled 718. The embodiments are not limited in this context.

FIG. 8 illustrates an example of a rack architecture 800 that may be representative of a rack architecture that may be implemented in order to provide support for sleds featuring expansion capabilities, such as sled 704 of FIG. 7. In the particular non-limiting example depicted in FIG. 8, rack architecture 800 includes seven sled spaces 803-1 to 803-7, which feature respective MPCMs 816-1 to 816-7. Sled spaces 803-1 to 803-7 include respective primary regions 803-1A to 803-7A and respective expansion regions 803-1B to 803-7B. With respect to each such sled space, when the corresponding MPCM is coupled with a counterpart MPCM of an inserted sled, the primary region may generally constitute a region of the sled space that physically accommodates the inserted sled. The expansion region may generally constitute a region of the sled space that can physically accommodate an expansion module, such as expansion sled 718 of FIG. 7, in the event that the inserted sled is configured with such a module.

FIG. 9 illustrates an example of a rack 902 that may be representative of a rack implemented according to rack architecture 800 of FIG. 8 according to some embodiments. In the particular non-limiting example depicted in FIG. 9, rack 902 features seven sled spaces 903-1 to 903-7, which include respective primary regions 903-1A to 903-7A and respective expansion regions 903-1B to 903-7B. In various embodiments, temperature control in rack 902 may be implemented using an air cooling system. For example, as reflected in FIG. 9, rack 902 may feature a plurality of fans 919 that are generally arranged to provide air cooling within the various sled spaces 903-1 to 903-7. In some embodiments, the height of the sled space is greater than the conventional “1U” server height. In such embodiments, fans 919 may generally comprise relatively slow, large diameter cooling fans as compared to fans used in conventional rack configurations. Running larger diameter cooling fans at lower speeds may increase fan lifetime relative to smaller diameter cooling fans running at higher speeds while still providing the same amount of cooling. The sleds are physically shallower than conventional rack dimensions. Further, components are arranged on each sled to reduce thermal shadowing (i.e., not arranged serially in the direction of air flow). As a result, the wider, shallower sleds allow for an increase in device performance because the devices can be operated at a higher thermal envelope (e.g., 250 W) due to improved cooling (i.e., no thermal shadowing, more space between devices, more room for larger heat sinks, etc.).

MPCMs 916-1 to 916-7 may be configured to provide inserted sleds with access to power sourced by respective power modules 920-1 to 920-7, each of which may draw power from an external power source 921. In various embodiments, external power source 921 may deliver alternating current (AC) power to rack 902, and power modules 920-1 to 920-7 may be configured to convert such AC power to direct current (DC) power to be sourced to inserted sleds. In some embodiments, for example, power modules 920-1 to 920-7 may be configured to convert 277-volt AC power into 12-volt DC power for provision to inserted sleds via respective MPCMs 916-1 to 916-7. The embodiments are not limited to this example.

MPCMs 916-1 to 916-7 may also be arranged to provide inserted sleds with optical signaling connectivity to a dual-mode optical switching infrastructure 914, which may be the same as—or similar to—dual-mode optical switching infrastructure 514 of FIG. 5. In various embodiments, optical connectors contained in MPCMs 916-1 to 916-7 may be designed to couple with counterpart optical connectors contained in MPCMs of inserted sleds to provide such sleds with optical signaling connectivity to dual-mode optical switching infrastructure 914 via respective lengths of optical cabling 922-1 to 922-7. In some embodiments, each such length of optical cabling may extend from its corresponding MPCM to an optical interconnect loom 923 that is external to the sled spaces of rack 902. In various embodiments, optical interconnect loom 923 may be arranged to pass through a support post or other type of load-bearing element of rack 902. The embodiments are not limited in this context. Because inserted sleds connect to an optical switching infrastructure via MPCMs, the resources typically spent in manually configuring the rack cabling to accommodate a newly inserted sled can be saved.

FIG. 10 illustrates an example of a sled 1004 that may be representative of a sled designed for use in conjunction with rack 902 of FIG. 9 according to some embodiments. Sled 1004 may feature an MPCM 1016 that comprises an optical connector 1016A and a power connector 1016B, and that is designed to couple with a counterpart MPCM of a sled space in conjunction with insertion of MPCM 1016 into that sled space. Coupling MPCM 1016 with such a counterpart MPCM may cause power connector 1016 to couple with a power connector comprised in the counterpart MPCM. This may generally enable physical resources 1005 of sled 1004 to source power from an external source, via power connector 1016 and power transmission media 1024 that conductively couples power connector 1016 to physical resources 1005.

Sled 1004 may also include dual-mode optical network interface circuitry 1026. Dual-mode optical network interface circuitry 1026 may generally comprise circuitry that is capable of communicating over optical signaling media according to each of multiple link-layer protocols supported by dual-mode optical switching infrastructure 914 of FIG. 9. In some embodiments, dual-mode optical network interface circuitry 1026 may be capable both of Ethernet protocol communications and of communications according to a second, high-performance protocol. In various embodiments, dual-mode optical network interface circuitry 1026 may include one or more optical transceiver modules 1027, each of which may be capable of transmitting and receiving optical signals over each of one or more optical channels. The embodiments are not limited in this context.

Coupling MPCM 1016 with a counterpart MPCM of a sled space in a given rack may cause optical connector 1016A to couple with an optical connector comprised in the counterpart MPCM. This may generally establish optical connectivity between optical cabling of the sled and dual-mode optical network interface circuitry 1026, via each of a set of optical channels 1025. Dual-mode optical network interface circuitry 1026 may communicate with the physical resources 1005 of sled 1004 via electrical signaling media 1028. In addition to the dimensions of the sleds and arrangement of components on the sleds to provide improved cooling and enable operation at a relatively higher thermal envelope (e.g., 250 W), as described above with reference to FIG. 9, in some embodiments, a sled may include one or more additional features to facilitate air cooling, such as a heat pipe and/or heat sinks arranged to dissipate heat generated by physical resources 1005. It is worthy of note that although the example sled 1004 depicted in FIG. 10 does not feature an expansion connector, any given sled that features the design elements of sled 1004 may also feature an expansion connector according to some embodiments. The embodiments are not limited in this context.

FIG. 11 illustrates an example of a data center 1100 that may generally be representative of one in/for which one or more techniques described herein may be implemented according to various embodiments. As reflected in FIG. 11, a physical infrastructure management framework 1150A may be implemented to facilitate management of a physical infrastructure 1100A of data center 1100. In various embodiments, one function of physical infrastructure management framework 1150A may be to manage automated maintenance functions within data center 1100, such as the use of robotic maintenance equipment to service computing equipment within physical infrastructure 1100A. In some embodiments, physical infrastructure 1100A may feature an advanced telemetry system that performs telemetry reporting that is sufficiently robust to support remote automated management of physical infrastructure 1100A. In various embodiments, telemetry information provided by such an advanced telemetry system may support features such as failure prediction/prevention capabilities and capacity planning capabilities. In some embodiments, physical infrastructure management framework 1150A may also be configured to manage authentication of physical infrastructure components using hardware attestation techniques. For example, robots may verify the authenticity of components before installation by analyzing information collected from a radio frequency identification (RFID) tag associated with each component to be installed. The embodiments are not limited in this context.

As shown in FIG. 11, the physical infrastructure 1100A of data center 1100 may comprise an optical fabric 1112, which may include a dual-mode optical switching infrastructure 1114. Optical fabric 1112 and dual-mode optical switching infrastructure 1114 may be the same as—or similar to—optical fabric 412 of FIG. 4 and dual-mode optical switching infrastructure 514 of FIG. 5, respectively, and may provide high-bandwidth, low-latency, multi-protocol connectivity among sleds of data center 1100. As discussed above, with reference to FIG. 1, in various embodiments, the availability of such connectivity may make it feasible to disaggregate and dynamically pool resources such as accelerators, memory, and storage. In some embodiments, for example, one or more pooled accelerator sleds 1130 may be included among the physical infrastructure 1100A of data center 1100, each of which may comprise a pool of accelerator resources—such as co-processors and/or FPGAs, for example—that is globally accessible to other sleds via optical fabric 1112 and dual-mode optical switching infrastructure 1114.

In another example, in various embodiments, one or more pooled storage sleds 1132 may be included among the physical infrastructure 1100A of data center 1100, each of which may comprise a pool of storage resources that is available globally accessible to other sleds via optical fabric 1112 and dual-mode optical switching infrastructure 1114. In some embodiments, such pooled storage sleds 1132 may comprise pools of solid-state storage devices such as solid-state drives (SSDs). In various embodiments, one or more high-performance processing sleds 1134 may be included among the physical infrastructure 1100A of data center 1100. In some embodiments, high-performance processing sleds 1134 may comprise pools of high-performance processors, as well as cooling features that enhance air cooling to yield a higher thermal envelope of up to 250 W or more. In various embodiments, any given high-performance processing sled 1134 may feature an expansion connector 1117 that can accept a far memory expansion sled, such that the far memory that is locally available to that high-performance processing sled 1134 is disaggregated from the processors and near memory comprised on that sled. In some embodiments, such a high-performance processing sled 1134 may be configured with far memory using an expansion sled that comprises low-latency SSD storage. The optical infrastructure allows for compute resources on one sled to utilize remote accelerator/FPGA, memory, and/or SSD resources that are disaggregated on a sled located on the same rack or any other rack in the data center. The remote resources can be located one switch jump away or two-switch jumps away in the spine-leaf network architecture described above with reference to FIG. 5. The embodiments are not limited in this context.

In various embodiments, one or more layers of abstraction may be applied to the physical resources of physical infrastructure 1100A in order to define a virtual infrastructure, such as a software-defined infrastructure 1100B. In some embodiments, virtual computing resources 1136 of software-defined infrastructure 1100B may be allocated to support the provision of cloud services 1140. In various embodiments, particular sets of virtual computing resources 1136 may be grouped for provision to cloud services 1140 in the form of SDI services 1138. Examples of cloud services 1140 may include—without limitation—software as a service (SaaS) services 1142, platform as a service (PaaS) services 1144, and infrastructure as a service (IaaS) services 1146.

In some embodiments, management of software-defined infrastructure 1100B may be conducted using a virtual infrastructure management framework 1150B. In various embodiments, virtual infrastructure management framework 1150B may be designed to implement workload fingerprinting techniques and/or machine-learning techniques in conjunction with managing allocation of virtual computing resources 1136 and/or SDI services 1138 to cloud services 1140. In some embodiments, virtual infrastructure management framework 1150B may use/consult telemetry data in conjunction with performing such resource allocation. In various embodiments, an application/service management framework 1150C may be implemented in order to provide QoS management capabilities for cloud services 1140. The embodiments are not limited in this context.

Referring now to FIGS. 12-21, during operation, a compute sled 1200 may send data to a storage sled 1300 for storage. In some embodiments, the compute sled 1200 may compress the data prior to sending the data to the storage sled. In other embodiments, the storage sled 1300 may compress the data after receiving the data from the compute sled 1200. If the data to be stored is “hot” data (i.e., is likely to be frequently accessed), the compute sled 1200 or storage sled 1300 may compress the data using a low-latency compression algorithm, which may have a latency that is less than or comparable to the latency for accessing the data from the storage device.

Referring specifically now to FIG. 12, an illustrative compute sled 1200 includes processor(s) 1202, memory 1204, an input/output (I/O) subsystem 1206, a communication circuit 1208, a hardware accelerator 1210, and, optionally, data storage 1212. In some embodiments, one or more of the illustrative components of the compute sled 1200 may be incorporated in, or otherwise form a portion of, another component. For example, the memory 1204, or portions thereof, may be incorporated in the processor 1202 in some embodiments.

The processor 1202 may be embodied as any type of processor capable of performing the functions described herein. For example, the processor 1202 may be embodied as a single or multi-core processor(s), a single or multi-socket processor, a digital signal processor, a graphics processor, a microcontroller, or other processor or processing/controlling circuit. Similarly, the memory 1204 may be embodied as any type of volatile or non-volatile memory or data storage capable of performing the functions described herein. In operation, the memory 1204 may store various data and software used during operation of the compute sled 1200 such as operating systems, applications, programs, libraries, and drivers. The memory 1204 is communicatively coupled to the processor 1202 via the I/O subsystem 1206, which may be embodied as circuitry and/or components to facilitate input/output operations with the processor 1202, the memory 1204, and other components of the compute sled 1200. For example, the I/O subsystem 1206 may be embodied as, or otherwise include, memory controller hubs, input/output control hubs, firmware devices, communication links (i.e., point-to-point links, bus links, wires, cables, light guides, printed circuit board traces, etc.) and/or other components and subsystems to facilitate the input/output operations.

The communication circuit 1208 may be embodied as any type of communication circuit, device, or collection thereof, capable of enabling communications between the compute sled 1200 and other devices. To do so, the communication circuit 1208 may be configured to use any one or more communication technology and associated protocols (e.g., Ethernet, Bluetooth®, Wi-Fi®, WiMAX, near field communication (NFC), etc.) to effect such communication. In the illustrative embodiment, the communication circuit 1208 includes an optical communicator capable of sending and receiving at a high rate, such as a rate of 20, 50, 100, or 200 gigabits per second (Gbps).

The hardware accelerator 1210 may be embodied as any hardware that is optimized or otherwise particularly configured to perform compression and/or decompression of data. The hardware accelerator 1210 may be capable of being programmed to perform different compression algorithms or may be configured to only perform a fixed set of compression algorithm(s). The hardware accelerator 1210 may, in some embodiments, be embodied in or otherwise form a part of another component of the compute sled, such as the processor 1202. In some embodiments, the hardware accelerator 1210 may have multiple circuits capable of performing compression or decompression in parallel. In the illustrative embodiment, the hardware accelerator 1210 includes a circuit for each processor core of the one or more processors 1202 (or, if the processor 1202 uses hyperthreading, the hardware accelerator 1210 may have two circuits for each processor core of the one or more processors 1202). Such a configuration allows for a separate hardware accelerator circuit for each thread that is being executed by the processor 1202.

The optional data storage 1212 may be embodied as any type of device or devices configured for the short-term or long-term storage of data. For example, the data storage 1212 may include any one or more memory devices and circuits, memory cards, hard disk drives, solid-state drives, or other data storage devices.

Referring now to FIG. 13, an illustrative storage sled 1300 includes processor(s) 1302, memory 1304, an I/O subsystem 1306, data storage 1308, a communication circuit 1310, and optional hardware accelerator 1312. Each of the processor 1302, the memory 1304, the I/O subsystem 1306, the data storage 1308, the communication circuit 1310, and the optional hardware accelerator 1312 may be similar to the corresponding components of the compute sled 1200. As such, the description of those components of the compute sled 1200 is equally applicable to the description of those components of storage sled 1300 and is not repeated herein for clarity of the description. It should be appreciated that, in the illustrative embodiment, the compute sled 1200 is configured to be optimized for performing compute tasks, and may include several high-speed processors 1202 and large amounts of high-speed memory 1204 with little or no data storage 1212, and the storage sled 1300 is configured to be optimized for performing storage tasks, and may include a large amount of data storage 1308 with relatively slow processors 1302 and a relatively small amount of memory 1304 as compared to the processors 1202 and memory 1204 of the compute sled 1200.

It should be appreciated that the embodiments of the compute sled 1200 described in FIG. 12 and the storage sled 1300 described in FIG. 13 are not limiting. For example, in some embodiments, the sleds 1200 and/or 1300 may be embodied as a sled 704 as shown in FIG. 7, a sled 1004 as shown in FIG. 10, or any combination of the sleds 704, 1004, 1200, and 1300. Of course, any embodiment of the sleds 1200 and/or 1300 will include a hardware accelerator if necessary to perform the particular task required for a particular embodiment.

Referring now to FIG. 14, a top perspective view of an illustrative storage sled 1300 is shown. As illustrated, the storage sled 1300 includes a top side 1402. The illustrative storage sled 1300 includes two processors 1302 (which may each incorporate a hardware accelerator 1312) and a communication circuit 1310 positioned on the top side 1402. The storage sled 1300 further includes a storage cage 1404 positioned at one end of the storage sled 1300 that includes the physical data storage 1308. The illustrative storage sled 1300 includes sixteen SSDs mounted to slots in the storage cage 1404.

Referring now to FIG. 15, a bottom perspective view of the illustrative storage sled 1300 is shown. As illustrated, the storage sled 1300 also includes a bottom side 1502. The storage sled 1300 includes memory 1304 positioned on the bottom side 1502. The memory 1304 is illustratively shown as multiple Dynamic Random-Access Memory (DRAM) Dual In-line Memory Modules (DIMMs). Examples are not limited to DRAM memory devices for DIMMs, other types of volatile and/or non-volatile memory devices are contemplated. For example, types of volatile memory may include, but are not limited to, data rate synchronous dynamic RAM (DDR SDRAM), static random-access memory (SRAM), thyristor RAM (T-RAM) or zero-capacitor RAM (Z-RAM). Types of non-volatile memory may include byte or block addressable types of non-volatile memory. The byte or block addressable types of non-volatile memory may include, but are not limited to, 3-dimensional (3-D) cross-point memory, memory that uses chalcogenide phase change material (e.g., chalcogenide glass), multi-threshold level NAND flash memory, NOR flash memory, single or multi-level phase change memory (PCM), resistive memory, nanowire memory, ferroelectric transistor random access memory (FeTRAM), magnetoresistive random access memory (MRAIVI) memory that incorporates memristor technology, or spin transfer torque MRAM (STT-MRAIVI), or a combination of any of the above, or other non-volatile memory types.

Referring now to FIG. 16, in use, the compute sled 1200 may establish an environment 1600. The illustrative environment 1600 includes a data access analyzer 1602, a data compressor 1604, a data encryptor 1606 and a communication engine 1608. It should be appreciated that, in use, the compute sled 1200 may include additional components not shown in FIG. 16 to perform computation tasks that may be executed by the compute sled 1200, such as computation tasks that generate data to be stored. The various components of the environment 1600 may be embodied as hardware, firmware, software, or a combination thereof. As such, in some embodiments, one or more of the components of the environment 1600 may be embodied as circuitry or collection of electrical devices (e.g., a data access analyzer circuit 1602, a data compressor circuit 1604, a data encryptor circuit 1606, etc.). It should be appreciated that, in such embodiments, the data access analyzer circuit 1602, the data compressor circuit 1604, the data encryptor circuit 1606, etc., may form a portion of one or more of the processor 1202, the I/O subsystem 1206, the communication circuit 1208, the hardware accelerator 1210, and/or other components of the compute sled 1200. Additionally, in some embodiments, one or more of the illustrative components may form a portion of another component and/or one or more of the illustrative components may be independent of one another. Further, in some embodiments, one or more of the components of the environment 1600 may be embodied as virtualized hardware components or emulated architecture, which may be established and maintained by the processor 1202 or other components of the compute sled 1200.

The data access analyzer 1602 is configured to determine the frequency at which a particular piece of data is accessed or expected to be accessed. For example, the data access analyzer 1602 may record every access to the data, and analyze previous accesses to determine how frequently the data is expected to be accessed in the future. In some embodiments, the data access analyzer 1602 may be given an indication that a particular piece of data is likely to be accessed frequently. For example, an application associated with the data might provide such an indication.

The data compressor 1604 is configured to compress and decompress data. The data compressor 1604 includes a low-latency data compressor 1610 and a high-compression-ratio data compressor 1612. The low-latency data compressor 1610 is optimized for compressing and decompressing data with low latency and may not necessarily compress the data in the most efficient manner possible. The low-latency data compressor 1610 may use any appropriate data compression algorithm, such as the Snappy compression algorithm. It should be appreciated that, as used herein, a compression may include both an algorithm used for compression as well as a corresponding algorithm used for decompression. For example, a low-latency compression algorithm may be used to refer to an algorithm for compressing data as well as the corresponding algorithm for decompressing data. In the illustrative embodiment, the low-latency data compressor 1610 is optimized for high data throughput as well as low latency. For example, the data throughput of the low-latency data compressor 1610 for compression and/or decompression may be equal to the bandwidth of the communication circuits 1208 and 1310 so that the low-latency data compressor 1610 is not the bottleneck for any data that is compressed or decompressed immediately before being sent or after being received. In some embodiments, such as embodiments in which the low-latency data compressor 1610 is embodied as hardware, the data throughput of the low-latency data compressor 1610 may be increased by the presence of multiple parallel hardware circuits to perform data compression and/or decompression. In the illustrative embodiment, each hardware circuit of the low-latency data compressor 1610 may be configured to compress data at a data throughput rate of a certain number of bytes per clock cycle, such as at least 0.5 bytes, 1 byte, or 2 bytes. The clock frequency may be any appropriate clock frequency, such as at least 500 MHz, 1 GHz, 2, GHz, or 3 GHz. In the illustrative embodiment, the low-latency data compressor 1610 has a latency that is less than a latency of the data storage 1308. For example, the low-latency data compressor 1610 may have a latency for compression and/or decompression for a block of data that is less than 5 microseconds, 2 microseconds, or 1 microsecond. The block of data may be, e.g., 1,024, 2048, 4,098, or 8,192 bits long.

The high-compression-ratio data compressor 1612 is optimized for compressing and decompressing data with a high compression ratio and may not necessarily have as high of a data throughput or as low of a latency as the low-latency data compressor 1610. The high-compression-ratio data compressor 1612 may use any appropriate algorithm, such as a Lempel-Ziv (LZ) compression algorithm.

The data encryptor 1606 is configured to encrypt data. The data encryptor 1606 may use any encryption algorithm, including symmetric and asymmetric encryption algorithms. The communication engine 1608 is configured to send and receive data using the communication circuit 1208. The communication engine 1608 may use any appropriate protocol to send and receive data.

Referring now to FIG. 17, in use, the storage sled 1300 may establish an environment 1700. The illustrative environment 1700 includes a data access analyzer 1702, a data compressor 1704, and a communication engine 1706. Each of the data access analyzer 1702, the data compressor 1704, and the communication engine 1706 may be similar to the corresponding components of the environment 1600 of the compute sled 1200. As such, the description of those components of the environment 1600 is equally applicable to the description of those components of the environment 1700 of the storage sled 1300 and is not repeated herein for clarity of the description.

Referring now to FIG. 18, in use, the compute sled 1200 may execute a method 1800 for compressing and sending data to be stored to a storage sled 1300. The method 1800 begins in block 1802, in which the compute sled 1200 determines data to be stored in the storage sled, such as data generated by an application that is being executed by the compute sled 1200.

In block 1804, the compute sled 1200 determines whether the data should be compressed. In some embodiments, all data that is to be stored on a storage sled 1300 may be compressed. In other embodiments, the compute sled 1200, or the application running on the compute sled 1200, may have a policy indicating which data should be compressed.

In block 1806, if the data is not to be compressed, the method 1800 jumps to block 1820 discussed below. If, however, the data is to be compressed, the method 1800 proceeds to block 1808, in which the compute sled 1200 determines whether to compress the data with a low-latency compression algorithm. To do so, in block 1810, the compute sled 1200 determines a frequency of access to the data (e.g., based on previous accesses to the data that have been monitored by the compute sled 1200), and may compare the frequency of access of the data to a threshold frequency to determine whether to compress the data with a low-latency compression algorithm (i.e., if the frequency of access is greater than the threshold frequency, the data may be compressed with a low-latency compression algorithm). In block 1812, the compute sled 1200 may receive compression instructions from an application associated with the data (e.g., the application which generated the data or will be accessing the data). The compression instructions may dictate whether the data should be compressed, as well as specific compression parameters in some embodiments. In other embodiments, the compute sled 1200 may determine whether to compress the data with the low-latency compression algorithm based on additional factors, such as based on a type of the data or an age of the data.

In block 1814, if the compute sled 1200 should compress the data with a low-latency compression algorithm, the compute sled 1200 compresses the data with the low-latency compression algorithm in block 1816. As discussed above in more detail, the compute sled 1200 may use the processor 1202 or the hardware accelerator 1210 to compress the data.

Referring back to block 1812, if the compute sled 1200 should not compress the data with a low-latency compression algorithm, the compute sled 1200 compresses the data with a high-compressing-ratio algorithm in block 1818. Regardless of which compression algorithm is used, the method 1800 subsequently proceeds to block 1820, in which, in some embodiments, the compute sled 1200 encrypts the data. Subsequently, in block 1822, the compute sled 1200 sends the compressed data to the storage sled 1300.

Referring now to FIG. 19, in use, the compute sled 1200 may execute a method 1900 for retrieving compressed data from a storage sled 1300. The method 1900 begins in block 1902, in which the compute sled 1200 sends a request to the storage sled 1300 for the compressed data. In block 1904, the compute sled 1200 receives the requested data from the storage sled 1300.

As discussed above, the compressed data may be encrypted in some embodiments. In such embodiments, the compute sled 1200 decrypts the requested data in block 1906. Subsequently, in block 1908, the compute sled 1200 decompresses the data with the appropriate compression algorithm (i.e., depending on which algorithm was used to compress the data). For example, the compute sled 1200 may decompress the data with the low-latency compression algorithm in block 1910. Alternatively, the compute sled 1200 may decompress the data with the high-compression-ratio compression algorithm in block 1912. In some embodiments, the decompression algorithm may be compatible with the algorithm used for both low-latency compression and high-compression ratio compression, such as embodiments which use a compression algorithm with a compression level as a parameter, such as the zlib compression algorithm. In such embodiments, the compute sled 1200 may decompress the data with the same algorithm regardless of the algorithm used to compress the data.

Referring now to FIG. 20, in use, the storage sled 1300 may execute a method 1900 for storing data received from a compute sled 1200. The method 1900 begins in block 1902, in which the storage sled 1300 receives data from a compute sled 1200 to be stored on the storage sled 1300.

In block 2004, the storage sled 1300 determines whether the received data should be compressed. In some embodiments, all data that is to be stored on the storage sled 1300 may be compressed. In other embodiments, the requesting compute sled 1200 may send an indication with the data indicating whether the data should be compressed, or the storage sled 1300 may have a policy indicating which data should be compressed (e.g., the policy may be based on remaining storage capacity, the size of the data to be stored, applications storing the data, etc.).

In block 2006, if the storage sled 1300 determines that the data is not to be compressed, the method 2000 jumps to block 2020 discussed below. If, however, the storage sled 1300 determines that the data is to be compressed, the method 2000 proceeds to block 2008, in which the storage sled 1300 determines whether to compress the data with a low-latency compression algorithm. To do so, in block 2010, the storage sled 1300 determines a frequency of access to the data (e.g., based on previous accesses to the data that have been monitored by the storage sled 1300), and may compare the frequency of access of the data to a threshold frequency to determine whether to compress the data with a low-latency compression algorithm (i.e., if the frequency of access is greater than the threshold frequency, then the data should be compressed with a low-latency compression algorithm). In block 2012, the storage sled 1300 may receive an indication of a compression algorithm to use from the compute sled 1200 (e.g., an indication that is sent contemporaneously with the data). In other embodiments, the storage sled 1300 may determine whether to compress the data with the low-latency compression algorithm based on additional factors, such as based on a type of the data or an age of the data.

In block 2014, if the storage sled 1300 determines that the data should be compressed with a low-latency compression algorithm, the storage sled 1300 compresses the data with the low-latency compression algorithm in block 2016. As discussed above in more detail, the storage sled 1300 may use the processor 1302 or the hardware accelerator 1312 to compress the data.

Referring back to block 2014, if the storage sled 1300 determines that the data should not be compressed with a low-latency compression algorithm, the storage sled 1300 compresses the data with a high-compressing-ratio algorithm in block 2018. The method 2000 subsequently proceeds from either block 2016 or block 2018 to block 2020, in which the storage sled 1300 stores the compressed data in the data storage 1308.

Referring now to FIG. 21, in use, the storage sled may execute a method 2100 for retrieving compressed data in response to a data request from a compute sled 1200. The method 2100 begins in block 2102, in which the storage sled 1300 receives a request from the compute sled 1200 for particular compressed data. In block 2104, the storage sled 1300 retrieves the requested data from data storage 1308 of the storage sled 1300. It should be appreciated that the compressed data may be stored in the storage sled 1300 by execution of the method 2000 or by other means, such as by another sled of the data center compressing the data and sending it to the storage sled 1300 for storage prior to receipt of the request for data from the compute sled 1200.

The storage sled 1300 decompresses the data in block 2106 using the appropriate compression algorithm (i.e., depending on which algorithm was used to compress the data). For example, the storage sled 1300 may decompress the data with the low-latency compression algorithm in block 2108. Alternatively, the storage sled may decompress the data with the high-compression-ratio compression algorithm in block 2110. In some embodiments, the decompression algorithm may be compatible with the algorithm used for both low-latency compression and high-compression ratio compression, such as embodiments which use a compression algorithm with a compression level as a parameter, such as the zlib compression algorithm. In such embodiments, the storage sled 1300 may decompress the data with the same algorithm regardless of the algorithm used to compress the data. Regardless, after the storage sled 1300 has decompressed the retrieved data, the storage sled 1300 sends the decompressed data to the compute sled in block 2112.

Examples

Illustrative examples of the devices, systems, and methods disclosed herein are provided below. An embodiment of the devices, systems, and methods may include any one or more, and any combination of, the examples described below.

Example 1 includes a storage sled for low-latency compression of data in a data center, the storage sled comprising a communication engine to receive, from a compute sled, a request for compressed data stored on a storage device of the storage sled; a data compressor to retrieve the compressed data from the storage device in response to the request for the data; and decompress the compressed data with a low-latency compression algorithm in response to the request for the data; and the communication engine further to send, to the compute sled, the decompressed data in response to the request for the data, wherein a latency for retrieval of the compressed data from the storage device is greater than a latency for decompression of the compressed data with the low-latency compression algorithm.

Example 2 includes the subject matter of Example 1, and wherein the communication engine is further to receive, from the compute sled in the data center, the data for storage prior to receipt of the request for the data, wherein the data compressor is further to determine whether to compress the data with the low-latency compression algorithm; compress the data with the low-latency compression algorithm in response to a determination to compress the data with the low-latency compression algorithm; and store the compressed data on a storage device of the storage sled.

Example 3 includes the subject matter of any of Examples 1 and 2, and wherein the communication engine is further to receive, from another sled in the data center, the compressed data for storage prior to receipt of the request for the data, wherein the data compressor is further to store the compressed data on a storage device of the storage sled.

Example 4 includes the subject matter of any of Examples 1-3, and wherein the communication engine is further to receive, from the compute sled, additional data to be stored, wherein the data compressor is further to determine whether to compress the additional data with the low-latency compression algorithm; compress the additional data with a high-compression-ratio compression algorithm different from the low-latency compression algorithm in response to a determination not to compress the additional data with the low-latency compression algorithm; and store the compressed additional data on the storage device of the storage sled; wherein a compression ratio of the compressed additional data is greater than a compression ratio of the compressed data.

Example 5 includes the subject matter of any of Examples 1-4, and wherein the communication engine is further to receive, from the compute sled, a request for the additional data, wherein the data compressor is further to retrieve the compressed additional data from the storage device in response to the request for the additional data; and decompress the compressed additional data with the high-compression-ratio compression algorithm in response to the request for the additional data, wherein the communication engine is further to send, to the compute sled, the decompressed additional data in response to the request for the additional data, and wherein a latency for retrieval of the compressed additional data from the storage device is less than a latency for decompression of the compressed additional data with the high-compression-ratio compression algorithm.

Example 6 includes the subject matter of any of Examples 1-5, and wherein a decompression algorithm of the low-latency compression algorithm is the same as a decompression algorithm of the high-compression-ratio compression algorithm.

Example 7 includes the subject matter of any of Examples 1-6, and wherein to decompress the data with the low-latency compression algorithm comprises to decompress the data with the low-latency compression algorithm with a hardware compression accelerator of the storage sled.

Example 8 includes the subject matter of any of Examples 1-7, and wherein to send the data to be stored comprises to send the data to be stored at a maximum bandwidth of communication circuitry of the storage sled and wherein a decompression throughput of the hardware compression accelerator is at least the maximum bandwidth of the communication circuitry.

Example 9 includes the subject matter of any of Examples 1-8, and wherein the maximum bandwidth of the communication circuitry is at least 50 gigabits per second.

Example 10 includes the subject matter of any of Examples 1-9, and wherein the maximum bandwidth of the communication circuitry is at least 200 gigabits per second.

Example 11 includes the subject matter of any of Examples 1-10, and wherein the latency for decompression of the compressed data with the low-latency compression algorithm is less than 2 microseconds.

Example 12 includes the subject matter of any of Examples 1-11, and wherein the data comprises a block of at least 4,096 bits.

Example 13 includes the subject matter of any of Examples 1-12, and wherein to determine whether to compress the data with the low-latency compression algorithm comprises to receive, from the compute sled, an indication to compress the data with the low-latency compression algorithm.

Example 14 includes the subject matter of any of Examples 1-13, and wherein to determine whether to compress the data with the low-latency compression algorithm comprises to analyze a frequency of access to the data; determine whether the frequency of access is above a threshold; determine, in response to a determination that the frequency of access is above the threshold, to compress the data with the low-latency compression algorithm.

Example 15 includes a compute sled for low-latency compression of data in a data center, the compute sled comprising a hardware accelerator; a data compressor to compress, by the hardware accelerator of the compute sled, data to be stored; a communication engine to send, to a storage sled, the compressed data to be stored; send, to the storage sled, a request for the stored compressed data; and receive, from the storage sled, the compressed data; the data compressor further to decompress, by the hardware accelerator of the compute sled, the compressed data, wherein a latency from transmission of the request for the stored compressed data to receipt of the compressed data from the storage sled is greater than a latency for decompression of the compressed data by the hardware accelerator.

Example 16 includes the subject matter of Example 15, and further including a plurality of hardware accelerators, wherein the number of hardware accelerators in the plurality of hardware accelerators is at least the number of processor cores of the compute sled, and wherein each hardware accelerator of the plurality of hardware accelerators is associated with a corresponding processor core of a plurality of processor cores of the compute sled, wherein the communication engine is further to send, by each processor core of the plurality of processor cores and to the storage sled, a request for data to be processed by the corresponding processor core; and receiving, for each processor core of the plurality of processor cores, the data to be processed by the corresponding processor core, the data compressor further to contemporaneously decompress, by each hardware accelerator of the plurality of hardware accelerators, the data to be processed by the processor core associated with the corresponding hardware accelerator.

Example 17 includes the subject matter of any of Examples 15 and 16, and wherein the plurality of processor cores is configured to execute a plurality of threads, wherein each thread of the plurality of threads is associated with a different processor core of the plurality of processor cores.

Example 18 includes the subject matter of any of Examples 15-17, and further including a data encryptor to encrypt the compressed data prior to transmission of the compressed data to the storage sled.

Example 19 includes the subject matter of any of Examples 15-18, and wherein the latency for decompression of the compressed data is less than 2 microseconds.

Example 20 includes the subject matter of any of Examples 15-19, and wherein to compress, by the hardware accelerator of the compute sled, the data to be stored comprises to determine whether to compress the data with a low-latency compression algorithm; and compress, by the hardware accelerator of the compute sled and in response to a determination to compress the data with the low-latency compression algorithm, the data with the low-latency compression algorithm.

Example 21 includes the subject matter of any of Examples 15-20, and wherein to determine whether to compress the data with the low-latency compression algorithm comprises to analyze a frequency of access to the data; determine whether the frequency of access is above a threshold; determine, in response to a determination that the frequency of access is above the threshold, to compress the data with the low-latency compression algorithm.

Example 22 includes the subject matter of any of Examples 15-21, and wherein to determine whether to compress the data with the low-latency compression algorithm comprises to determine whether to compress the data with the low-latency compression algorithm without instruction from an application of the compute sled associated with the data.

Example 23 includes the subject matter of any of Examples 15-22, and wherein to determine whether to compress the data with the low-latency compression algorithm comprises to determine whether to compress the data with the low-latency compression algorithm in response to an instruction from an application of the compute sled associated with the data.

Example 24 includes the subject matter of any of Examples 15-23, and wherein to compress, by the hardware accelerator of the compute sled, the data to be stored comprises to determine whether to compress the data with a low-latency compression algorithm; and compress, by the hardware accelerator of the compute sled and in response to a determination not to compress the data with the low-latency compression algorithm, the data with a high-compression-ratio compression algorithm different from the low-latency compression algorithm.

Example 25 includes the subject matter of any of Examples 15-24, and wherein to determine whether to compress the data with the low-latency compression algorithm comprises to analyze a frequency of access to the data; determine whether the frequency of access is above a threshold; determine, in response to a determination that the frequency of access is above the threshold, to compress the data with the low-latency compression algorithm.

Example 26 includes the subject matter of any of Examples 15-25, and wherein to determine whether to compress the data with the low-latency compression algorithm comprises to determine whether to compress the data with the low-latency compression algorithm without instruction from an application of the compute sled associated with the data.

Example 27 includes the subject matter of any of Examples 15-26, and wherein to determine whether to compress the data with the low-latency compression algorithm comprises to determine whether to compress the data with the low-latency compression algorithm in response to an instruction from an application of the compute sled associated with the data.

Example 28 includes a method for low-latency compression of data on a storage sled in a data center, the method comprising receiving, by the storage sled and from a compute sled, a request for compressed data stored on a storage device of the storage sled; retrieving, by the storage sled, the compressed data from the storage device in response to the request for the data; decompressing, by the storage sled, the compressed data with a low-latency compression algorithm in response to the request for the data; and sending, by the storage sled and to the compute sled, the decompressed data in response to the request for the data, wherein a latency for retrieving, by the storage sled, the compressed data from the storage device is greater than a latency for decompressing, by the storage sled, the compressed data with the low-latency compression algorithm.

Example 29 includes the subject matter of Example 28, and further including receiving, by the storage sled and from the compute sled in the data center, the data for storage prior to receiving the request for the data; determining, by the storage sled, whether to compress the data with the low-latency compression algorithm; compressing, by the storage sled, the data with the low-latency compression algorithm in response to a determination to compress the data with the low-latency compression algorithm; and storing, by the storage sled, the compressed data on a storage device of the storage sled.

Example 30 includes the subject matter of any of Examples 28 and 29, and further including receiving, by the storage sled and from another sled in the data center, the compressed data for storage prior to receiving the request for the data; and storing the compressed data on a storage device of the storage sled.

Example 31 includes the subject matter of any of Examples 28-30, and further including receiving, by the storage sled and from the compute sled, additional data to be stored; determining, by the storage sled, whether to compress the additional data with the low-latency compression algorithm; compressing, by the storage sled, the additional data with a high-compression-ratio compression algorithm different from the low-latency compression algorithm in response to a determination not to compress the additional data with the low-latency compression algorithm; storing, by the storage sled, the compressed additional data on the storage device of the storage sled; wherein a compression ratio of the compressed additional data is greater than a compression ratio of the compressed data.

Example 32 includes the subject matter of any of Examples 28-31, and further including receiving, by the storage sled and from the compute sled, a request for the additional data; retrieving, by the storage sled, the compressed additional data from the storage device in response to the request for the additional data; decompressing, by the storage sled, the compressed additional data with the high-compression-ratio compression algorithm in response to the request for the additional data; and sending, by the storage sled and to the compute sled, the decompressed additional data in response to the request for the additional data, wherein a latency for retrieving, by the storage sled, the compressed additional data from the storage device is less than a latency for decompressing, by the storage sled, the compressed additional data with the high-compression-ratio compression algorithm.

Example 33 includes the subject matter of any of Examples 28-32, and wherein a decompression algorithm of the low-latency compression algorithm is the same as a decompression algorithm of the high-compression-ratio compression algorithm.

Example 34 includes the subject matter of any of Examples 28-33, and wherein decompressing the data with the low-latency compression algorithm comprises decompressing the data with the low-latency compression algorithm with a hardware compression accelerator of the storage sled.

Example 35 includes the subject matter of any of Examples 28-34, and wherein sending the data to be stored comprises sending data to be stored at a maximum bandwidth of communication circuitry of the storage sled and wherein a decompression throughput of the hardware compression accelerator is at least the maximum bandwidth of the communication circuitry.

Example 36 includes the subject matter of any of Examples 28-35, and wherein the maximum bandwidth of the communication circuitry is at least 50 gigabits per second.

Example 37 includes the subject matter of any of Examples 28-36, and wherein the maximum bandwidth of the communication circuitry is at least 200 gigabits per second.

Example 38 includes the subject matter of any of Examples 28-37, and wherein the latency for decompressing the compressed data with the low-latency compression algorithm is less than 2 microseconds.

Example 39 includes the subject matter of any of Examples 28-38, and wherein the data comprises a block of at least 4,096 bits.

Example 40 includes the subject matter of any of Examples 28-39, and wherein determining whether to compress the data with the low-latency compression algorithm comprises receiving, by the storage sled and from the compute sled, an indication to compress the data with the low-latency compression algorithm.

Example 41 includes the subject matter of any of Examples 28-40, and wherein determining whether to compress the data with the low-latency compression algorithm comprises analyzing, by the storage sled, a frequency of access to the data; determining, by the storage sled, whether the frequency of access is above a threshold; determining, by the storage sled and in response to a determination that the frequency of access is above the threshold, to compress the data with the low-latency compression algorithm.

Example 42 includes a method for low-latency compression of data on a compute sled in a data center, the method comprising compressing, by a hardware accelerator of the compute sled, data to be stored; sending, by the compute sled and to a storage sled, the compressed data to be stored; sending, by the compute sled and to the storage sled, a request for the stored compressed data; receiving, by the compute sled and from the storage sled, the compressed data; and decompressing, by the hardware accelerator of the compute sled, the compressed data wherein a latency from sending the request for the stored compressed data to receiving the compressed data from the storage sled is greater than a latency for decompressing, by the hardware accelerator, the compressed data.

Example 43 includes the subject matter of Example 42, and wherein the compute sled comprises a plurality of hardware accelerators, wherein the number of hardware accelerators in the plurality of hardware accelerators is at least the number of processor cores of the compute sled, and wherein each hardware accelerator of the plurality of hardware accelerators is associated with a corresponding processor core of a plurality of processor cores of the compute sled, and further comprising sending, by each processor core of the plurality of processor cores and to the storage sled, a request for data to be processed by the corresponding processor core; receiving, by the compute sled and for each processor core of the plurality of processor cores, the data to be processed by the corresponding processor core; and contemporaneously decompressing, by each hardware accelerator of the plurality of hardware accelerators, the data to be processed by the processor core associated with the corresponding hardware accelerator.

Example 44 includes the subject matter of any of Examples 42 and 43, and further including executing, on the plurality of processor cores, a plurality of threads, wherein each thread of the plurality of threads is associated with a different processor core of the plurality of processor cores.

Example 45 includes the subject matter of any of Examples 42-44, and further including encrypting, by the compute sled, the compressed data prior to sending the compressed data to the storage sled.

Example 46 includes the subject matter of any of Examples 42-45, and wherein the latency for decompressing the compressed data with the low-latency compression algorithm is less than 2 microseconds.

Example 47 includes the subject matter of any of Examples 42-46, and wherein compressing, by the hardware accelerator of the compute sled, the data to be stored comprises determining, by the compute sled, whether to compress the data with a low-latency compression algorithm; and compressing, by the hardware accelerator of the compute sled and in response to a determination to compress the data with the low-latency compression algorithm, the data with the low-latency compression algorithm.

Example 48 includes the subject matter of any of Examples 42-47, and wherein determining, by the compute sled, whether to compress the data with the low-latency compression algorithm comprises analyzing, by the compute sled, a frequency of access to the data; determining, by the compute sled, whether the frequency of access is above a threshold; determining, by the compute sled and in response to a determination that the frequency of access is above the threshold, to compress the data with the low-latency compression algorithm.

Example 49 includes the subject matter of any of Examples 42-48, and wherein determining, by the compute sled, whether to compress the data with the low-latency compression algorithm comprises determining, by the compute sled, whether to compress the data with the low-latency compression algorithm without instruction from an application of the compute sled associated with the data.

Example 50 includes the subject matter of any of Examples 42-49, and wherein determining, by the compute sled, whether to compress the data with the low-latency compression algorithm comprises determining, by the compute sled, whether to compress the data with the low-latency compression algorithm in response to an instruction from an application of the compute sled associated with the data.

Example 51 includes the subject matter of any of Examples 42-50, and wherein compressing, by the hardware accelerator of the compute sled, the data to be stored comprises determining, by the compute sled, whether to compress the data with a low-latency compression algorithm; and compressing, by the hardware accelerator of the compute sled and in response to a determination not to compress the data with the low-latency compression algorithm, the data with a high-compression-ratio compression algorithm different from the low-latency compression algorithm.

Example 52 includes the subject matter of any of Examples 42-51, and wherein determining, by the compute sled, whether to compress the data with the low-latency compression algorithm comprises analyzing, by the compute sled, a frequency of access to the data; determining, by the compute sled, whether the frequency of access is above a threshold; determining, by the compute sled and in response to a determination that the frequency of access is above the threshold, to compress the data with the low-latency compression algorithm.

Example 53 includes the subject matter of any of Examples 42-52, and wherein determining, by the compute sled, whether to compress the data with the low-latency compression algorithm comprises determining, by the compute sled, whether to compress the data with the low-latency compression algorithm without instruction from an application of the compute sled associated with the data.

Example 54 includes the subject matter of any of Examples 42-53, and wherein determining, by the compute sled, whether to compress the data with the low-latency compression algorithm comprises determining, by the compute sled, whether to compress the data with the low-latency compression algorithm in response to an instruction from an application of the compute sled associated with the data.

Example 55 includes one or more computer-readable media comprising a plurality of instructions stored thereon that, when executed, causes a sled to perform the method of any of Examples 28-54.

Example 56 includes a sled comprising means to perform the method of any of Examples 28-54.

Example 57 includes a storage sled for low-latency compression of data in a data center, the storage sled comprising means for receiving, from a compute sled, a request for compressed data stored on a storage device of the storage sled; means for retrieving the compressed data from the storage device in response to the request for the data; means for decompressing the compressed data with a low-latency compression algorithm in response to the request for the data; and means for sending, to the compute sled, the decompressed data in response to the request for the data, wherein a latency for retrieving the compressed data from the storage device is greater than a latency for decompressing the compressed data with the low-latency compression algorithm.

Example 58 includes the subject matter of Example 57, and further including means for receiving, from the compute sled in the data center, the data for storage prior to receiving the request for the data; means for determining whether to compress the data with the low-latency compression algorithm; means for compressing the data with the low-latency compression algorithm in response to a determination to compress the data with the low-latency compression algorithm; and means for storing the compressed data on a storage device of the storage sled.

Example 59 includes the subject matter of any of Examples 57 and 58, and further including means for receiving, from another sled in the data center, the compressed data for storage prior to receiving the request for the data; and means for storing the compressed data on a storage device of the storage sled.

Example 60 includes the subject matter of any of Examples 57-59, and further including means for receiving, from the compute sled, additional data to be stored; means for determining whether to compress the additional data with the low-latency compression algorithm; means for compressing the additional data with a high-compression-ratio compression algorithm different from the low-latency compression algorithm in response to a determination not to compress the additional data with the low-latency compression algorithm; means for storing the compressed additional data on the storage device of the storage sled; wherein a compression ratio of the compressed additional data is greater than a compression ratio of the compressed data.

Example 61 includes the subject matter of any of Examples 57-60, and further including means for receiving, from the compute sled, a request for the additional data; means for retrieving the compressed additional data from the storage device in response to the request for the additional data; means for decompressing the compressed additional data with the high-compression-ratio compression algorithm in response to the request for the additional data; and means for sending, to the compute sled, the decompressed additional data in response to the request for the additional data, wherein a latency for retrieving the compressed additional data from the storage device is less than a latency for decompressing the compressed additional data with the high-compression-ratio compression algorithm.

Example 62 includes the subject matter of any of Examples 57-61, and wherein a decompression algorithm of the low-latency compression algorithm is the same as a decompression algorithm of the high-compression-ratio compression algorithm.

Example 63 includes the subject matter of any of Examples 57-62, and wherein the means for decompressing the data with the low-latency compression algorithm comprises means for decompressing the data with the low-latency compression algorithm with a hardware compression accelerator of the storage sled.

Example 64 includes the subject matter of any of Examples 57-63, and wherein the means for sending the data to be stored comprises means for sending data to be stored at a maximum bandwidth of communication circuitry of the storage sled and wherein a decompression throughput of the hardware compression accelerator is at least the maximum bandwidth of the communication circuitry.

Example 65 includes the subject matter of any of Examples 57-64, and wherein the maximum bandwidth of the communication circuitry is at least 50 gigabits per second.

Example 66 includes the subject matter of any of Examples 57-65, and wherein the maximum bandwidth of the communication circuitry is at least 200 gigabits per second.

Example 67 includes the subject matter of any of Examples 57-66, and wherein the latency for decompressing the compressed data with the low-latency compression algorithm is less than 2 microseconds.

Example 68 includes the subject matter of any of Examples 57-67, and wherein the data comprises a block of at least 4,096 bits.

Example 69 includes the subject matter of any of Examples 57-68, and wherein the means for determining whether to compress the data with the low-latency compression algorithm comprises means for receiving, from the compute sled, an indication to compress the data with the low-latency compression algorithm.

Example 70 includes the subject matter of any of Examples 57-69, and wherein the means for determining whether to compress the data with the low-latency compression algorithm comprises means for analyzing a frequency of access to the data; means for determining whether the frequency of access is above a threshold; means for determining, in response to a determination that the frequency of access is above the threshold, to compress the data with the low-latency compression algorithm.

Example 71 includes a compute sled for low-latency compression of data in a data center, the compute sled comprising means for compressing, by a hardware accelerator of the compute sled, data to be stored; means for sending, to a storage sled, the compressed data to be stored; means for sending, to the storage sled, a request for the stored compressed data; means for receiving, from the storage sled, the compressed data; and means for decompressing, by the hardware accelerator of the compute sled, the compressed data wherein a latency from sending the request for the stored compressed data to receiving the compressed data from the storage sled is greater than a latency for decompressing, by the hardware accelerator, the compressed data.

Example 72 includes the subject matter of Example 71, and wherein the compute sled comprises a plurality of hardware accelerators, wherein the number of hardware accelerators in the plurality of hardware accelerators is at least the number of processor cores of the compute sled, and wherein each hardware accelerator of the plurality of hardware accelerators is associated with a corresponding processor core of a plurality of processor cores of the compute sled, and further comprising means for sending, by each processor core of the plurality of processor cores and to the storage sled, a request for data to be processed by the corresponding processor core; means for receiving, for each processor core of the plurality of processor cores, the data to be processed by the corresponding processor core; and means for contemporaneously decompressing, by each hardware accelerator of the plurality of hardware accelerators, the data to be processed by the processor core associated with the corresponding hardware accelerator.

Example 73 includes the subject matter of any of Examples 71 and 72, and further including means for executing, on the plurality of processor cores, a plurality of threads, wherein each thread of the plurality of threads is associated with a different processor core of the plurality of processor cores.

Example 74 includes the subject matter of any of Examples 71-73, and further including means for encrypting the compressed data prior to sending the compressed data to the storage sled.

Example 75 includes the subject matter of any of Examples 71-74, and wherein the latency for decompressing the compressed data with the low-latency compression algorithm is less than 2 microseconds.

Example 76 includes the subject matter of any of Examples 71-75, and wherein the means for compressing, by the hardware accelerator of the compute sled, the data to be stored comprises means for determining whether to compress the data with a low-latency compression algorithm; and means for compressing, by the hardware accelerator of the compute sled and in response to a determination to compress the data with the low-latency compression algorithm, the data with the low-latency compression algorithm.

Example 77 includes the subject matter of any of Examples 71-76, and wherein the means for determining whether to compress the data with the low-latency compression algorithm comprises means for analyzing a frequency of access to the data; means for determining whether the frequency of access is above a threshold; means for determining, in response to a determination that the frequency of access is above the threshold, to compress the data with the low-latency compression algorithm.

Example 78 includes the subject matter of any of Examples 71-77, and wherein the means for determining whether to compress the data with the low-latency compression algorithm comprises means for determining whether to compress the data with the low-latency compression algorithm without instruction from an application of the compute sled associated with the data.

Example 79 includes the subject matter of any of Examples 71-78, and wherein the means for determining whether to compress the data with the low-latency compression algorithm comprises means for determining whether to compress the data with the low-latency compression algorithm in response to an instruction from an application of the compute sled associated with the data.

Example 80 includes the subject matter of any of Examples 71-79, and wherein the means for compressing, by the hardware accelerator of the compute sled, the data to be stored comprises means for determining whether to compress the data with a low-latency compression algorithm; and means for compressing, by the hardware accelerator of the compute sled and in response to a determination not to compress the data with the low-latency compression algorithm, the data with a high-compression-ratio compression algorithm different from the low-latency compression algorithm.

Example 81 includes the subject matter of any of Examples 71-80, and wherein the means for determining whether to compress the data with the low-latency compression algorithm comprises means for analyzing a frequency of access to the data; means for determining whether the frequency of access is above a threshold; means for determining, in response to a determination that the frequency of access is above the threshold, to compress the data with the low-latency compression algorithm.

Example 82 includes the subject matter of any of Examples 71-81, and wherein the means for determining whether to compress the data with the low-latency compression algorithm comprises means for determining whether to compress the data with the low-latency compression algorithm without instruction from an application of the compute sled associated with the data.

Example 83 includes the subject matter of any of Examples 71-82, and wherein the means for determining whether to compress the data with the low-latency compression algorithm comprises means for determining whether to compress the data with the low-latency compression algorithm in response to an instruction from an application of the compute sled associated with the data. 

1. A storage sled for low-latency compression of data in a data center, the storage sled comprising: a communication engine to receive, from a compute sled, a request for compressed data stored on a storage device of the storage sled; a data compressor to: retrieve the compressed data from the storage device in response to the request for the data; and decompress the compressed data with a low-latency compression algorithm in response to the request for the data; and the communication engine further to send, to the compute sled, the decompressed data in response to the request for the data, wherein a latency for retrieval of the compressed data from the storage device is greater than a latency for decompression of the compressed data with the low-latency compression algorithm.
 2. The storage sled of claim 1, wherein the communication engine is further to receive, from the compute sled in the data center, the data for storage prior to receipt of the request for the data, wherein the data compressor is further to: determine whether to compress the data with the low-latency compression algorithm; compress the data with the low-latency compression algorithm in response to a determination to compress the data with the low-latency compression algorithm; and store the compressed data on a storage device of the storage sled.
 3. The storage sled of claim 1, wherein the communication engine is further to receive, from the compute sled, additional data to be stored, wherein the data compressor is further to: determine whether to compress the additional data with the low-latency compression algorithm; compress the additional data with a high-compression-ratio compression algorithm different from the low-latency compression algorithm in response to a determination not to compress the additional data with the low-latency compression algorithm; and store the compressed additional data on the storage device of the storage sled; wherein a compression ratio of the compressed additional data is greater than a compression ratio of the compressed data.
 4. The storage sled of claim 1, wherein the latency for decompression of the compressed data with the low-latency compression algorithm is less than 2 microseconds.
 5. The storage sled of claim 4, wherein the data comprises a block of at least 4,096 bits.
 6. The storage sled of claim 1, wherein to determine whether to compress the data with the low-latency compression algorithm comprises to: analyze a frequency of access to the data; determine whether the frequency of access is above a threshold; determine, in response to a determination that the frequency of access is above the threshold, to compress the data with the low-latency compression algorithm.
 7. A compute sled for low-latency compression of data in a data center, the compute sled comprising: a hardware accelerator; a data compressor to compress, by the hardware accelerator of the compute sled, data to be stored; a communication engine to: send, to a storage sled, the compressed data to be stored; send, to the storage sled, a request for the stored compressed data; and receive, from the storage sled, the compressed data; the data compressor further to decompress, by the hardware accelerator of the compute sled, the compressed data, wherein a latency from transmission of the request for the stored compressed data to receipt of the compressed data from the storage sled is greater than a latency for decompression of the compressed data by the hardware accelerator.
 8. The compute sled of claim 7, further comprising a plurality of hardware accelerators, wherein the number of hardware accelerators in the plurality of hardware accelerators is at least the number of processor cores of the compute sled, and wherein each hardware accelerator of the plurality of hardware accelerators is associated with a corresponding processor core of a plurality of processor cores of the compute sled, wherein the communication engine is further to: send, by each processor core of the plurality of processor cores and to the storage sled, a request for data to be processed by the corresponding processor core; and receiving, for each processor core of the plurality of processor cores, the data to be processed by the corresponding processor core, the data compressor further to contemporaneously decompress, by each hardware accelerator of the plurality of hardware accelerators, the data to be processed by the processor core associated with the corresponding hardware accelerator.
 9. The compute sled of claim 7, wherein the latency for decompression of the compressed data is less than 2 microseconds.
 10. The compute sled of claim 9, wherein the data comprises a block of at least 4,096 bits.
 11. The compute sled of claim 7, wherein to compress, by the hardware accelerator of the compute sled, the data to be stored comprises to: determine whether to compress the data with a low-latency compression algorithm; and compress, by the hardware accelerator of the compute sled and in response to a determination to compress the data with the low-latency compression algorithm, the data with the low-latency compression algorithm.
 12. The compute sled of claim 11, wherein to determine whether to compress the data with the low-latency compression algorithm comprises to: analyze a frequency of access to the data; determine whether the frequency of access is above a threshold; determine, in response to a determination that the frequency of access is above the threshold, to compress the data with the low-latency compression algorithm.
 13. The compute sled of claim 7, wherein to compress, by the hardware accelerator of the compute sled, the data to be stored comprises to: determine whether to compress the data with a low-latency compression algorithm; and compress, by the hardware accelerator of the compute sled and in response to a determination not to compress the data with the low-latency compression algorithm, the data with a high-compression-ratio compression algorithm different from the low-latency compression algorithm.
 14. One or more machine-readable media comprising a plurality of instructions stored thereon that, when executed, causes a storage sled to: receive, from a compute sled, a request for compressed data stored on a storage device of the storage sled; retrieve the compressed data from the storage device in response to the request for the decompress the compressed data with a low-latency compression algorithm in response to the request for the data; and send, to the compute sled, the decompressed data in response to the request for the data, wherein a latency for retrieval of the compressed data from the storage device is greater than a latency for decompression of the compressed data with the low-latency compression algorithm.
 15. The one or more computer-readable media of claim 14, wherein the plurality of instructions further cause the storage sled to: receive, from the compute sled in the data center, the data for storage prior to receipt of the request for the data; determine whether to compress the data with the low-latency compression algorithm; compress the data with the low-latency compression algorithm in response to a determination to compress the data with the low-latency compression algorithm; and store the compressed data on a storage device of the storage sled.
 16. The one or more computer-readable media of claim 14 wherein the plurality of instructions further cause the storage sled to: receive, from the compute sled, additional data to be stored; determine whether to compress the additional data with the low-latency compression algorithm; compress the additional data with a high-compression-ratio compression algorithm different from the low-latency compression algorithm in response to a determination not to compress the additional data with the low-latency compression algorithm; and store the compressed additional data on the storage device of the storage sled, wherein a compression ratio of the compressed additional data is greater than a compression ratio of the compressed data.
 17. The one or more computer-readable media of claim 14, wherein the latency for decompression of the compressed data with the low-latency compression algorithm is less than 2 microseconds.
 18. The one or more computer-readable media of claim 17, wherein the data comprises a block of at least 4,096 bits.
 19. The one or more computer-readable media of claim 14, wherein to determine whether to compress the data with the low-latency compression algorithm comprises to: analyze a frequency of access to the data; determine whether the frequency of access is above a threshold; and determine, in response to a determination that the frequency of access is above the threshold, to compress the data with the low-latency compression algorithm.
 20. One or more machine-readable media comprising a plurality of instructions stored thereon that, when executed, causes a compute sled to: compress, by a hardware accelerator of the compute sled, data to be stored; send, to a storage sled, the compressed data to be stored; send, to the storage sled, a request for the stored compressed data; receive, from the storage sled, the compressed data; decompress, by the hardware accelerator of the compute sled, the compressed data, wherein a latency from transmission of the request for the stored compressed data to receipt of the compressed data from the storage sled is greater than a latency for decompression of the compressed data by the hardware accelerator.
 21. The one or more computer-readable media of claim 20, wherein the compute sled comprises a plurality of hardware accelerators, wherein the number of hardware accelerators in the plurality of hardware accelerators is at least the number of processor cores of the compute sled, and wherein each hardware accelerator of the plurality of hardware accelerators is associated with a corresponding processor core of a plurality of processor cores of the compute sled, wherein the plurality of instructions further causes the compute sled to: send, by each processor core of the plurality of processor cores and to the storage sled, a request for data to be processed by the corresponding processor core; receiving, for each processor core of the plurality of processor cores, the data to be processed by the corresponding processor core; and contemporaneously decompress, by each hardware accelerator of the plurality of hardware accelerators, the data to be processed by the processor core associated with the corresponding hardware accelerator.
 22. The one or more computer-readable media of claim 20, wherein the latency for decompression of the compressed data is less than 2 microseconds.
 23. The one or more computer-readable media of claim 20, wherein to compress, by the hardware accelerator of the compute sled, the data to be stored comprises to: determine whether to compress the data with a low-latency compression algorithm; and compress, by the hardware accelerator of the compute sled and in response to a determination to compress the data with the low-latency compression algorithm, the data with the low-latency compression algorithm.
 24. The one or more computer-readable media of claim 23, wherein to determine whether to compress the data with the low-latency compression algorithm comprises to: analyze a frequency of access to the data; determine whether the frequency of access is above a threshold; determine, in response to a determination that the frequency of access is above the threshold, to compress the data with the low-latency compression algorithm.
 25. The one or more computer-readable media of claim 20, wherein to compress, by the hardware accelerator of the compute sled, the data to be stored comprises to: determine whether to compress the data with a low-latency compression algorithm; and compress, by the hardware accelerator of the compute sled and in response to a determination not to compress the data with the low-latency compression algorithm, the data with a high-compression-ratio compression algorithm different from the low-latency compression algorithm. 